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NX26F011A NX26F041A
NX26F011A NX26F041A
1M-BIT AND 4M-BIT SERIAL FLASH MEMORY WITH 2-PIN NXS INTERFACE
PRE-RELEASE MAY 1999
1 2
FEATURES
* Tailored for Portable and Mobile Media-Storage - Ideal for portable/mobile applications that transfer and store data, audio, or images - Removable Serial Flash Module package option * NexFlash TM Non-volatile Memory Technology - Patented Single-Transistor EEPROM Cell - High-density, cost-effective, low-voltage/power - 10K/100K endurance, ten years data retention * Flash Memory for Battery-Operation - Single 5V or 3V supply for Read, Erase/Write - Icc 5 mA active with 1 A standby power - 5 ms Erase/Write times for efficient battery use * 1M-bits or 4M-bits of NexFlash Serial Memory - 512 or 2,048 sectors of 264 bytes each - Simple commands: Reset, Read, Write, Ready/Busy - No pre-erase required, auto-erases before write * Two-pin NXS Serial Interface - Saves Microcontroller-pins, simplifies PCB layout, low switching noise compared to parallel Flash - Supports clock operation as fast as 16 MHz - Multi-device cascading, up to 16 devices * Development Tools and Accessories - SFK-NXS Serial Flash Development Kit
3 4 5 6 7 8
Description
The NexFlashTM NX26F011A and NX26F041A Serial Flash Memories are tailored for portable/mobile media-storage applications that transfer and store data, audio and images. Manufactured using NexFlash's patented single transistor EEPROM memory cell, the NX26F011A and NX26F041A provide a high-density, low-voltage, low-power, and cost effective solution for battery-operated nonvolatile data storage requirements. The NX26F011A and NX26F041A can operate with a single 5V or 3V supply for Read, Write, and Erase. Power consumption is very low due to A standby current and fast Erase/Write performance (as fast as 5 ms per sector) that minimizes power-on time, resulting in a highly efficient energy-per-transfer ratio. The NX26F011A and NX26F041A offer 1M-bits and 4M-bits of Flash memory organized in sectors of 264 bytes each. Each sector is individually addressable through basic commands or control functions such as Reset, Read, Erase/Write, and Ready/Busy. The NXS (NexFlash Serial) 2-wire serial interface is ideal for use with microcontrollers since it only requires two pins. This leaves pins normally used for parallel Flash free for other uses. The NXS interface supports clock rates as fast as 16 MHz and allows for multi-device cascading of up to 16 devices. It also simplifies PC-board layout and generates less transient noise than parallel devices. Development is supported with the NexFlash Serial Flash Development Kit.
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This document contains PRELIMINARY INFORMATION. NexFlash reserves the right to make changes to its product at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors which may appear in this publication. Copyright 1998, NexFlash Technologies, Inc.
NexFlash Technologies, Inc.
PRELIMINARY NXSF009A-0599
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NX26F011A NX26F041A
Pin Descriptions
Package Types The NX26F011A and NX26F041A is available in a 24/28-pin TSOP (Type II) package (Figure 1 and Table 1) or a removable Serial Flash Module (see NX25Mxxx/NX26Mxxx Serial Flash Module data sheet for further information). Power Supply Pins (Vcc and GND) The NX26F011A and NX26F041A support single power supply Read, Erase, and Write operations available in 5V and 3V Vcc versions. Active power requirements are as low as 15 mA for 3V versions with standby current in the 1 A range. NXS Serial Interface Pins (SCK and SIO) The 2-wire NXS (NexFlash Serial) interface includes a Clock Input pin (SCK) and a single bidirectional I/O pin for data (SIO). All data to or from the SIO pin is clocked relative to the rising edge of SCK. The 2-wire NXS serial interface makes the NX26F011A and NX26F041A an ideal solution for removable non-volatile storage. A simple edge connector or cable/connector with four contacts (SCK, SIO, Vcc, and GND) can support communications with space efficiency and reliability. The NXS interface can operate at clock rates up to 16 MHz for 5V versions. Device Address Pins (A0, A1, A2, A3) There is no active chip select on the NX26F011A and NX26F041A. Instead, four static device address pins (A0, A1, A2, and A3) are provided for decoding from one to 16 possible devices (Figure 2). This allows up to 4MB (using an NX26F011A device) or 32MB (using an NX26F041A device) to be addressed via a single 2-wire NXS interface. The static address pins (A0-A3) must be tied high or low to match the device address field (DA3-DA0) in the sector Read and Erase/Write instruction sequences. No Connect Pins (N/C) The NX26F011A and NX26F041A uses only a few signal pins. As a result, the TSOP package has numerous no connects (NC) that have no electrical contact to the die.
A0 NC A2 NC NC VCC GND NC NC NC A3 SCK A1 SIO
1 2 3 4 5 6 7 8 9 10 11 12 13 14
28 27 26 25 24 23 22 21 20 19 18 17 16 15
NC NC NC NC NC NC NC NC NC NC NC NC NC NC
Table 1. Pin Descriptions A0, A1, A2, A3 SCK SIO Vcc GND NC Device Address Serial Clock Serial Data I/O Power Supply Ground No Connect
Figure 1. NX26F011A and NX26F041A Pin Assignments
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NX26F011A NX26F041A
NX26F011A or NX26F041A U0
NX26F011A or NX26F041A U1 1 0 0 0 A0 A1 A2 A3 0 1 0 0
NX26F011A or NX26F041A U2 A0 A1 A2 A3 1 1 0 0
NX26F011A or NX26F041A U3 A0 A1 A2 A3
1 2 3 4
MICROCONTROLLER / MICROPROCESSOR DSP or ASIC
0 0 0 0
A0 A1 A2 A3
....
SCK
SIO
0 0 0 1 A0 A1 A2 A3 NX26F011A or NX26F041A U8 1 0 0 1 A0 A1 A2 A3 NX26F011A or NX26F041A U9 0 1 0 1 A0 A1 A2 A3 NX26F011A or NX26F041A U10 1 1 0 1 A0 A1 A2 A3 NX26F011A or NX26F041A U11
.... 5
6 7 8 9 10 11
Figure 2. NX26F011A or NX26F041A Used in a Multi-device Configuration with up to 16-Devices on the 2-wire NSX
FUNCTIONAL OVERVIEW
The NexFlash NX26F011A and NX26F041A provide up to 1M-bits or 4M-bits of non-volatile memory organized as 512 or 2,048 small sectors of 264 bytes (4,288 bits) each (Figure 3). Each sector is individually addressable using basic instruction sequences and control functions communicated through the devices 2-wire NXS interface. Read and Erase/Write Instruction Sequences The NX26F011A and NX26F041A have two basic instruction sequences: Read and Erase/Write. Unlike some other Flash technologies, the erase and write operations of the NX26F011A and NX26F041A are performed together in one single operation (as fast as 5 ms per sector). Thus, pre-erase of the memory is not necessary. Both Read and Erase/Write instructions are made up of a series of serial bit fields that include command, sector address, device address, and sector data. The Read instruction sequence also allows the device to be polled for Ready/Busy status.
Sector 0 (0000H) 2112 Bits (264 Bytes) Per Sector Sector 1 (0001H) Sector 2 (0002H)
Sectors 3-2045/4093 (0003-1FD/7FD)
Sector 510/2046 (1FE/1FE) Sector 511/2047 (1FF/7FF)
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Figure 3. NX26F011A and NX26F041A Array 3
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NX26F011A NX26F041A
The instruction sequence format, flow charts, and clocking diagrams for Read and Erase/Write operations are shown in Figures 5 and 6, Figures 7 and 8, and Figures 9 and 10, respectively. All data within an instruction sequence is clocked on the rising edge. All instruction sequence fields are ordered by most significant bit first (MSB). Data is erased and written to the NX26F041A and NX26F011A memory array a full sector (264 bytes) at a time. If all 264 bytes of a given sector are not fully clocked into the device, the remaining byte locations will be overwritten with indeterminate values. To ensure the highest level of data integrity write operations should be verified and rewritten, if needed, (see High Data Integrity Applications). Reset and Idle Upon power-up and between Read and Erase/Write instruction sequences, the device's internal control logic will be reset. This is accomplished by asserting the SCK pin low (to VIL) for greater than tRESET (~5 ms to 10 ms depending on the voltage version being used). Once reset, the device enters standby operation and will not wake-up until the next rising edge of SCK. After an initial rising SCK occurs, the device becomes ready for a new instruction sequence. Full active power consumption starts after the correct device address is decoded during a Read or Write instruction sequence. To idle an instruction sequence between clocks, SCK must be kept high (at VIH) for as long as needed. Note that power will be in the active state when SCK is held high. Device Initialization After power-up it is recommended that the device information sector be read to electronically identify the device. The device information format contains a device ID that identifies the manufacturer, part number (memory size), and operating range. It also contains a list of any restricted sectors (see Sector Tag/Sync bytes). For a further description of the NX26F011A and NX26F041A device information format, see the Serial Flash Device Information Sector Application Note SFAN-02. As shown in Figure 6, the address for the device information sector address is at 5000H for both the NX26F011A and NX26F041A. The device information sector is a "read-only" sector. This assures that all device specific information, such as the restricted sector list, is maintained and never written over inadvertently. Ready/Busy Status After an Erase/Write instruction sequence has been executed, the device will become Busy while it erases and writes the addressed sector's memory. This period of time will not exceed tWP (~5 to 30 ms based on the specified power supply operating voltage). During this time the device can be tested for a Ready/Busy condition via a 16-bit status value obtained in the Read instruction sequence. The Busy status condition (6666H) indicates that the device has not yet completed its write operation and will not accept read or write instructions. The Ready status condition (9999H) indicates that the device is available for further read or write operations. Note that a delay time of tRP (~30 s to 100 s depending on the voltage version being used) is required after the first low to high clock transition of the Ready/Busy status read. Sector Tag/Sync Bytes The first byte of each sector is pre-programmed during manufacturing with a Tag/Sync value of "C9H". Although the first byte of each sector can be changed, it is recommended that Tag/Sync value be maintained and incorporated as part of the application's sector formatting. The Tag/Sync values serve two purposes. First, they provide a sync-detect that can help verify if the instruction sequence was clocked into the device properly. Secondly, they serve as a tag to identify a fully functional (valid) sector. This is especially important if "restricted sector" devices are used. Restricted sector devices provide a more cost effective alternative to NX26F011A or NX26F041A devices with 100% valid sectors. Restricted sector devices have a limited number of sectors (32 maximum. for the NX26F011A and NX26F041A) that do not meet manufacturing programming criteria over the specified operating range. When such a sector is detected, the first byte is tagged with a pattern other than "C9H". In addition to individual sector tagging, all restricted sectors for a given device are listed in the "device information format" (see Device Initialization). High Data Integrity Applications Data storage applications that use Flash memory or other non-volatile media must take into consideration the possibility of noise or other adverse system conditions that may affect data integrity. For those applications that require higher levels of data integrity it is a recommended practice to use Error Correcting Code (ECC) techniques. The NexFlash Serial Flash Development Kit provides a software routine for a 32-bit ECC that can detect up to two bit errors and correct one. The ECC not only minimizes problems caused by system noise but can also extend Flash memory endurance. For those systems without the processing power to handle ECC algorithms, a simple "verification after write" is recommended. The NexFlash Serial Flash Development Kit software includes a simple Write/Verify routine that will compare data written to a given sector and rewrite the sector if the compare is not correct.
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Command
Address
Reserved Status Data
INITIAL CLOCK To wake device from standby (Data is "Don't Care")
COMMAND TYPE
1 2 3 4 5 6 7 8 9 10 11 12
C3-C0 SA11-0 DA3-0 SA15-12 R31-R0 S15-S0 D0 - - - D2112
1H = Read MAIN SECTOR ADDRESS 000H-1FF for NX26F011A 000H-7FF for NX26F041A DEVICE ADDRESS A0-A3 pins = 0H-FH AUXILARY SECTOR ADDRESS 0H = To address main sector address 0-FFF 5H = Device information sector RESERVED Use 00 00 00 00H INPUT STATUS BYTES 9999H = Ready, 6666H = Busy Note: Delay is required during status byte read, see tRP in AC Characteristics INPUT SECTOR DATA BITS 0-2112 (264 Bytes)
Figure 5. Sector Read Instruction - Sequence and Bit Instruction
NexFlash Technologies, Inc.
PRELIMINARY NXSF009A-0599
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NX26F011A NX26F041A
Command Address Reserved Data Control
INITIAL CLOCK To wake device from standby (Data is "Don't Care") COMMAND TYPE 2H = Write MAIN SECTOR ADDRESS 000H-1FF for NX26F011A 000H-7FF for NX26F041A DEVICE ADDRESS A0-A3 pins = 0H-FH AUXILARY SECTOR ADDRESS 0H = main sector address 0-FFF RESERVED Use 00 00 00 00H SECTOR DATA BITS 0-2112 (264 Bytes) 16 EXTRA CLOCKS (Data is "Don't Care") C3-C0 A11-SA0 DA3-0 A15-12 R31-R0 D0 - - - D2112 X15-X0
Figure 6. Sector Erase/Write Instruction - Sequence and Bit Format
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NexFlash Technologies, Inc.
PRELIMINARY NXSF009A-0599
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NX26F011A NX26F041A
Start Sector Read Routine
Start Sector Erase/Write Routine
Output clock (low to high) to wake device from standby
1 2
No*
Call Read Sector Routine to check Ready/Busy and Tag
Output Command Sequence: -Read command C3-C0 (0001B) -Main Sector Address A1-A0 (000-1FF-7FF) -Device Address DA3-DA0 (per state of A3, A2, A1, A0 pins) -Auxilary Address A15-A12 0H for main array 5H device information sector -Four reserved bytes R31-R0 (00 00 00 00H)
Device Ready and Sector Tag valid Yes Output one clock to wake device from stand-by
3 4 5 6 7
Output Command Sequence: -Read command C3-C0 (0001B)
Input Ready/Busy Status S15-S0. Note tRP delay time is required during status read (See AC Timing and Figure 10)
-Main Sector Address A1-A0 (000-1FF-7FF) -Device Address DA3-DA0 (per state of A3, A2, A1, A0 pins) -Auxilary Address A15-A12 0H for main array
Ready? (99 99H)
No*
-Four reserved bytes R31-R0 (00 00 00 00H)
Yes
Input first byte of data (Tag/Sync) from sector
Output (Rewrite )1st byte of sector with C9H Tag/Sync bite
Valid Sector? (C9H) Yes Return to write routine? Yes* No Input remaining 264 bytes of sector data (2112 bits) *Set Flag and process accordingly upon return Assert CLK low for tRESET to reset device and invoke standby Return No*
8 9
Output remaining 264 bytes (2112 bits) of sector data
Output two bytes of zeros (00 00H)
Assert CLK low for tRESET to invoke Erase/Write Operation and then standby operation
10 11 12
*Set Flag and process accordingly upon return Return (1)
Figure 7. Sector Read Operation Flow Chart
Figure 8. Sector Erase/Write Operation Flow Chart
Note: 1. To ensure higher data integrity verify each sector write with a sector read. See High Data Integrity Applications on Page 4.
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PRELIMINARY NXSF009A-0599
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NX26F011A NX26F041A
Device leaves standby mode at this edge
SCK SIO
0 0 0 1 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 DA3 DA2 DA1 DA0 A15 A14 A13 A12
Read Command
12-Bit Sector Address
Device Address
Aux. Address
SCK SIO
MSB LSB
Four Reserved Bytes (Use 00 00 00 00H)
tRP
SCK SIO
1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1
Status Word (S15-S0): Ready: 9999H or Busy:6666H Device Drives SIO Line Float SIO so data direction can change from device input to output
2112 Clocks
8 Clocks
tRESET
SCK SIO
Bytes 0 to 262 Bytes 0 to 263
Device Releases SIO Line
Figure 9. Read Instruction Sequence Clocking
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PRELIMINARY NXSF009A-0599
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NX26F011A NX26F041A
Device leaves standby mode at this edge
1
A3 A2 A1 A0 DA3 DA2 DA1 DA0 0 0 0 0
SCK SIO
0 0 1 0 A11 A10 A9 A8 A7 A6 A5 A4
2 3
Write Command
12-Bit Sector Address
Device Address
0H
SCK SIO
MSB
Four reserved bytes (use 00 00 00 00H) LSB
4 5
8 Clocks
8 Clocks
2080 Clocks
SCK SIO
Byte 0 Byte 1 Bytes 2 to 261
6
Device enters standby mode after 8 Clocks 8 Clocks 16 Extra Clocks
tWP
tRESET tWP
7 8 9 10 11 12
SCK SIO
Byte 262 Byte 263 Don't Care
Figure 10. Erase/Write Instruction Sequence Clocking
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PRELIMINARY NXSF009A-0599
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NX26F011A NX26F041A
ABSOLUTE MAXIMUM RATINGS(1)
Symbol Vcc VIN, VOUT TSTG TLEAD Parameter Supply Voltage Voltage Applied to Any Pin Storage Temperature Lead Temperature Conditions Relative to Ground Soldering, Ten Seconds Range 0 to 7.0 -0.5 to Vcc + 0.6 -65 to +150 +300 Unit V V
C C
Note: 1. This device has been designed and tested for the specified operation ranges. Proper operation outside of these levels is not guaranteed. Exposure beyond absolute maximum ratings (listed above) may cause permanent damage
OPERATING RANGES
Symbol Vcc Parameter Supply Voltage Conditions 5.0V 3.0V 3.0V Commercial Extended(1) Industrial(1) Min 4.5 2.7 0 -15 -40 Max 5.5 3.6 +70 +80 +85 Unit V V C C C
TA
Ambient Temperature, Operating
Note: 1. Contact NexFlash for availability of extended or industrial grade devices.
DC ELECTRICAL CHARACTERISTICS
Symbol VIL VIH VOL VOH VOLC VOHC ILI IOL ICC (active) Parameter Input Low Voltage Input High Voltage Output Low Voltage Output High Voltage Output Low Voltage CMOS (1) Output High Voltage CMOS (1) Input Leakage I/O Leakage Active Power Supply Current (2) Conditions Min Typ -- -- -- -- -- -- -- -- 15 5 <1 -- -- Max Vcc x 0.2 Vcc + 0.5 0.45 -- 0.15 -- +10 +10 30 10 10 10 10 Unit V V V V V V A A mA A pF pF -0.4 Vcc x 0.6 IOL = 2 mA, VCC = 4.5V -- IOH = -400 A, VCC = 4.5V 2.4 VCC = Min, IOL = 10 A -- VCC = Min, IOH = -10 A VCC - 0.3 0 < VI N < Vcc -10 0 < VIN < Vcc, Output Disabled -10 fCLK 8 MHz (1/tCP) VCC = 4.5V to 5.5V -- VCC = 2.7V to 3.3V -- SIO = 0V or VCC, -- SCK = 0V TA = 25C, VCC = 5V or 3V -- Frequency = 1 MHz TA = 25C, VCC = 5V or 3V -- Frequency = 1 MHz
ICCSB (standby) Standby Power Supply Current CIN COUT Input Capacitance (1) Output Capacitance (1)
Notes: 1. Tested on a sample basis or specified via design or characterization data. 2. The device leaves "standby" power consumption after the clock transitions from low-to-high. Full "active" power consumption starts after the correct device address has been decoded during a sector read or write sequence.
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PRELIMINARY NXSF009A-0599
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NX26F011A NX26F041A
AC ELECTRICAL CHARACTERISTICS
Symbol tCP tCL, tCH tCR tCF tDS tDH tDV tRESET tRP tWP Description SCK Serial Clock Period SCK Serial Clock High or Low Time SCK Serial Clock Rise Time(1) SCK Serial Clock Fall Time(1) SIO Setup Time to SCK Rising Edge SIO Hold Time From SCK Rising Edge SIO Valid after SCK(2) SCK Low Duration for Valid Reset or Standby (See Figures 9 & 10) Read Pre-data Delay (See Figure 9) Erase/Write Program Time(3) (See Figure 10) 5V (16 MHz) Min Typ Max 62 26 -- -- 40 0 -- 1.5 30 -- -- -- -- -- -- -- -- -- -- 3 -- -- 7 7 -- -- 60 5 -- 5 3V (8 MHz) Min Typ Max 125 57 -- -- 100 0 -- 3 100 -- -- -- -- -- -- -- -- -- -- 5 -- -- 5 5 -- -- 115 10 -- 10 Unit ns ns ns ns ns ns ns s s ms
1 2 3 4 5 6 7
Notes: 1. Test points are 10% and 90% points for rise/fall times. All other timings are measured at the 50% point. 2. With 50 pF (8 MHz) or 30 pF (16 MHz) load SIO to GND. 3. The NX26F011A and NX26F041A are designed for Erase/Write endurances of 10K cycles. Endurance in the range of 100K cycles can be obtained using ECC software methods like those provided in the SFK Serial Flash Development Kit.
CLOCK AND DATA TIMING
8
tCP
9
tCL tDV
Read
tCH
SCK
tCF
tCR
tDV
SIO
10
tDS
Write
tDH
11 12
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PRELIMINARY NXSF009A-0599
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NX26F011A NX26F041A
PACKAGE INFORMATION
Plastic TSOP - 28-pin Package Code: V (Type I)
1
E
H
N D
SEATING PLANE
A
e
B
L A1
C
Plastic TSOP (T--Type I) Millimeters Inches Symbol Min Max Min Max Ref. Std. No. Leads 28 A 1.00 1.20 0.039 0.047 A1 0.05 0.20 0.002 0.008 B 0.15 0.25 0.006 0.010 C 0.10 0.20 0.004 0.008 D 7.90 8.10 0.311 0.319 E 11.60 11.80 0.457 0.465 H 13.30 13.50 0.524 0.531 e 0.55 BSC 0.022 BSC L 0.50 0.70 0.020 0.028 0 5 0 5 12
Notes: 1. Controlling dimension: millimeters, unless otherwise specified. 2. BSC = Basic lead spacing between centers. 3. Dimensions D and E do not include mold flash protrusions and should be measured from the bottom of the package. 4. Formed leads shall be planar with respect to one another within 0.004 inches at the seating plane.
NexFlash Technologies, Inc.
PRELIMINARY NXSF009A-0599
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NX26F011A NX26F041A
ORDERING INFORMATION
Size 1M-bit 1M-bit Order Part No. NX26F011A-3V-R (1) NX26F011A-5V-R (1) Package/Description (2) NXS, 28-pin, TSOP (Type I) 32 RS, 3V Low Voltage NXS, 28-pin, TSOP (Type I) 32 RS, 5V Standard Voltage NXS, 28-pin, TSOP (Type I) 32 RS, 3V Low Voltage NXS, 28-pin, TSOP (Type I) 32 RS, 5V Standard Voltage
1 2 3 4 5 6
4M-bit 4M-bit
NX26F041A-3V-R NX26F041A-5V-R (1)
Notes: 1. Add E (Extended) or I (Industrial) after package designator (V) for alternative temperature grades. 2. See 26Mxxx data sheet for Serial Flash Module package.
PRELIMINARY DESIGNATION
The "Preliminary" designation on an NexFlash data sheet indicates that the product is not fully characterized. The specifications are subject to change and are not guaranteed. NexFlash or an authorized sales representative should be consulted for current information before using this product.
LIFE SUPPORT POLICY
NexFlash does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause failure in the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless NexFlash receives written assurances, to its satisfaction, that:
(a) the risk of injury or damage has been minimized;
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IMPORTANT NOTICE
NexFlash reserves the right to make changes to the products contained in this publication in order to improve design, performance or reliability. NexFlash assumes no responsibility for the use of any circuits described herein, conveys no license under any patent or other right, and makes no representation that the circuits are free of patent infringement. Charts and schedules contained herein reflect representative operating parameters, and may vary depending upon a user's specific application. While the information in this publication has been carefully checked, NexFlash shall not be liable for any damages arising as a result of any error or omission.
(b) the user assumes all such risks; and (c) potential liability of NexFlash is adequately protected under the circumstances.
Trademarks: NexFlashTM is a trademark of NexFlash Technologies, Inc. All other marks are the property of their respective owners.
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